Ongoing technological developments have led to an increasing number of electronic and electrical devices, e.g., cell phones, which use and need the support of timing technologies. Phase locked loops (PLLs) found in integrated circuits are used in signal processing and synchronizing applications in support of these timing needs. A phase locked loop typically includes an oscillator and a phase detector for comparing the phases of two signals. Various forms of phase locked loops have been used over time for this purpose, including a digital phase locked loop (DPLL) which includes a digital controllable oscillator (DCO).
For transmitters with a polar and highly digitized architecture, a DCO can be used to generate the phase modulation (PM). To generate a transmitter (TX) signal with sufficient quality (e.g., low EVM and low spectral mask) the accuracy of the DCO frequency versus settings should be very good, e.g., the steps size should be approximately linear, e.g., for Bluetooth (BT) typically within a few percent.
The DCO can be tested on a production tester (ATE) to guarantee a good modulation quality before shipment to the customer. The area covered by the DCO including its quantity of capacitors is significant and therefore chances of structural errors are normally considered to be too high to leave it untested. The quality of the modulated signal can, for instance, be measured to test the quality of the DCO. However, there are at least two problems associated with this method. First, the measurement takes a relatively long time since many different sequences of test symbols are needed to get a good average of the signal quality (EVM). Secondly, the measurement is relatively complex to implement on a tester, since a complete demodulation algorithm needs to be build in the tester.
Alternatively the DCO can be tested with a simpler method, i.e., measuring of the frequency of the DCO over all settings. However, the change in frequency is relatively small (approx 40 ppm) so an even higher accuracy is normally needed to test the linearity of the steps, which requires relatively long measurement times.
Accordingly, it would be desirable to provide new testing systems and methods for DCO capacitors which avoid or reduce the above described drawbacks.